Description: The circuit consists of an oscillator, a counter, and an Iseki circuit divided into three parts. The oscillator is based on the NE555 timer and several external RC components, generating a pulse signal for the counter. The instantaneous power is influenced by the derivative action of capacitors and resistors, which clears the counter. The output of the counter is in the form of a four-digit BCD code. The ABCD outputs are connected in parallel with two single six-channel analog switches, IC3 and IC4, which utilize the CD4067. The counter counts up to 15 pulses; when this limit is reached, the internal analog switch of IC3 is activated. Due to the power supply circuit, IC4 remains inactive, resulting in lower power consumption. Although the input terminal IC is connected in parallel, the internal analog switches do not conduct. Transistors BG1 through BG4 before IC4 remain off when a voltage is applied to block the output signal of IC2, serving as protection for IC4. When IC2 counts to 15 pulses, the analog switch of IC3 is turned on, causing the 16th pin to go high. Concurrently, the end of IC2 is cleared, and through diode D3, the thyristor IC4 is energized. Starting from the 16th pulse, the analog switch of IC4 will gradually turn off. Meanwhile, transistor BG6 conducts, while BG5 is reverse-biased and turned off. The INH (inhibit) terminal of the IC transitions from low to high, disabling the internal switch and rendering the 8421 input invalid. This means that from the 16th pulse onward, the counting function is managed by IC3 and IC4. When the pulse count reaches 32, the 16-block of IC4 is activated, and the 16-pin goes high due to the addition of diode D1 at the end of IC2, which clears the counter. Simultaneously, D4 activates BG, saturating it and triggering the SCR to short to ground, turning off IC4. As a result, BG6 turns off, and BG5 conducts, causing the INH terminal to return to low, allowing valid BCD code input, and the circuit resets to its operational state. This cycle continues, controlling a thirty-lamp system voltage, with the flow rate adjustable via a potentiometer.
The described circuit integrates several components to achieve a precise counting and control mechanism. The NE555 timer serves as the core oscillator, generating clock pulses that drive the counter. The external RC elements are crucial for defining the timing characteristics of the oscillator, which directly influences the pulse frequency sent to the counter.
The counter utilizes a BCD output format, allowing for straightforward digital representation of the counted pulses. The use of the CD4067 analog switches enables efficient control of the signals based on the counter's state, allowing for selective activation of subsequent stages in the circuit.
Transistors BG1 to BG4 serve as protective elements, ensuring that the circuit operates within safe limits by blocking unwanted signals when necessary. The interaction between the components is carefully designed to manage power consumption effectively, particularly in the case of the thyristor IC4, which is only activated under specific conditions to minimize power draw.
The circuit's operational cycle is designed to repeat continuously, allowing for dynamic control over the connected lamp system. The inclusion of a potentiometer for flow rate adjustment provides flexibility in operation, making this circuit suitable for various applications requiring precise timing and control. Overall, the circuit exemplifies a well-thought-out design that balances functionality, efficiency, and ease of use. By the oscillator circuit, a counter, Iseki circuit of three parts. Oscillation circuit by the time base manifold NE555 and several external RC element. Its function is to prov ide a pulse signal to the counter. Instantaneous power between, since derivative action C], Rl, and the counter is cleared. With ICl IC2 delivery continued to pulse count after counting the number of pulses output is put in the form of four-digit BCD code. In the ABCD output of the counter, in parallel with IC3, IC4 two single six-speed analog switch IC CD4067.
In the counter counts to 15 before the pulse, only IC3 internal analog switch is turned on. Since the power supply circuit IC4 thyristor not conducting derived less power, and therefore although the input terminal 1C, connected in parallel, but internal analog switches non-conductive. Transistor BGi ~ BG4 before IC4 not be turned off by applying a voltage to block IC2 output signal is applied to IC4, IC4 protect the role.
When IC2 count to 15 pulses when, IC, analog switch block 16 is turned on, that is, it goes 16 feet high. On the one hand, by the IC2 R end in Makati and is cleared; the other, through D3 female hair thyristor, IC4 energized, thus starting from the first 16 pulses, IC4 of the analog switch off will gradually lead through.
Meanwhile, BG6 conduction, BG, reverse bias is turned off. IC, the INH (inhibit) terminal from low to high, the internal switch off the whole, 8421 yards invalid input. That is, since the beginning of the 16th pulse, count the number of functions performed by the IC3 jurisdiction Ic4.
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