Preregulated-high-voltage-supply

Description: One of the control circuit's triacs selects the tap on the main transformer T1, which provides the proper preregulated voltage to the secondary regulator. T2 and its associated components comprise the secondary regulator. The ADC 0804, IC1, digitizes a voltage feedback signal from the secondary regulator's output. The MC1415 demultiplexer, IC2, decodes the digitizer's output. IC2, in turn, drives T1's optoisolated triacs via the 74LS240 driver chip, IC3, and associated optoisolators. Transformer T3 samples the circuit's current output. The auxiliary 12 V winding on T1 ensures no-load starting. The combination of op-amp IC5 and the inverting transistor Q1 squares this current signal. The output of Q1 is the CLK signal, which triggers one-half of the one-shot IC4A to begin the circuit's A/D conversion. The one-shot's periods are set to time out within 1/2 cycle of the AC input. Upon completion of its A/D conversion, IC1's INTR output triggers the other half of the one-shot, IC4B, which enables the converter's data outputs. The rising edge of the CLK signal resets the one-shot and latches the new conversion value into IC2. The latch, associated driver, and optoisolator trigger a selected triac according to the latest value of the voltage feedback signal, V.

The control circuit utilizes a triac to select the appropriate tap on transformer T1, which is crucial for providing a preregulated voltage to the secondary regulator, composed of T2 and its related components. The ADC 0804 (IC1) plays a pivotal role in digitizing the voltage feedback signal derived from the output of the secondary regulator. Subsequently, the MC1415 demultiplexer (IC2) decodes this digital output, allowing it to control the optoisolated triacs associated with transformer T1 through the 74LS240 driver chip (IC3) and the relevant optoisolators.

Transformer T3 is responsible for sampling the current output of the circuit, while the auxiliary 12V winding on transformer T1 is designed to facilitate no-load starting conditions. The op-amp IC5, in conjunction with the inverting transistor Q1, processes the current signal to produce a square wave output. This output serves as the CLK signal, which activates one-half of the one-shot timer IC4A, initiating the A/D conversion process.

The timing intervals for the one-shot are configured to expire within half a cycle of the alternating current (AC) input, ensuring synchronization with the input waveform. Once the A/D conversion is complete, the INTR output from IC1 signals the second half of the one-shot, IC4B, to enable the data outputs from the converter. The rising edge of the CLK signal triggers a reset of the one-shot while simultaneously latching the newly converted value into IC2. Finally, the latch, along with the associated driver and optoisolator, activates a selected triac based on the most recent voltage feedback signal value, V, thereby controlling the output voltage and ensuring the desired operational characteristics of the circuit.One of the control circuit"s triacs selects the tap on main transformer Tl, which provides the proper, preregulated voltage to the secondary regulator. T2 and its associated components comprise the secondary regulator. The ADC 0804, IC1, digitizes a voltage-feedback signal from the secondary regulator"s output. The MC1415 demultiplexer, IC2, decodes the digitizer"s output. IC2, in turn, drives Tl"s optoisolated triacs via the 74LS240 driver chip, IC3, and associated optoisolators.

Transformer T3 samples the circuit"s current output. The auxiliary, 12 V winding on Tl ensures noload starting. The combination of op amp IC5 and the inverting transistor, Ql, square this current signal. The output of Ql is the CLK signal, which triggers one-half of the one shot, IC4A, to begin the circuit"s AID conversion. The one shots" periods are set to time out within 1l2 cycle of the ac input. Upon completion of its AID conversion, ICl"s INTR output triggers the other half of the one shot, IC4B, which enables the converter"s data outputs.

The rising edge of the CLK signal resets the one shot and latches the new conversion value into IC2. The latch, associated driver, and optoisolator trigger a selected triac according to the latest value of the voltage-feedback signal, V,.