CD4011 dual-produced sound and light control delay lamp circuit

Description: The circuit utilizes CD4011 digital circuits to create a sound-activated light lamp with a dual-control delay section. The left portion of the circuit represents the lighting lines, while the right part consists of the sound and light control delay switch, which is constructed using SCR to form the main lighting circuit. The control loop comprises two-input NAND gates from the CD4011, where four NAND gates are configured. One NAND gate functions as a linear amplifier to amplify the audio signal from a microphone input. The second NAND gate serves as the light control switch, while the third NAND gate is configured as a monostable circuit. The logic functions of the NAND gates are characterized by the truth table: "See 0 1, all the 1 0." During daytime, the indoor lighting is strong; the light-sensitive resistor (R0) exhibits low resistance when exposed to light, causing the second NAND gate's inputs (pins 1 and 3) to receive a low level "0," resulting in a high output level at pin 2, which is also "1." Consequently, the inputs at pins 5 and 6 are grounded to a low level "0," leading to a high output at pin 4 and pin 8 being "1." When both inputs of the third NAND gate are "1," the output at pin 10 becomes "0," preventing the capacitor (C5) from charging, and the transistor (VT) remains off, keeping the light unlit. In the evening, the photoresistor (R6) exhibits high resistance, which is significantly greater than R8, causing pin 3 to output a high level "1," enabling the lights. If a sound signal is detected, it is amplified by the first NAND gate and subsequently processed through a charging circuit involving R6 and C4, resulting in a high level "1" at pin 12. This activates the second NAND gate, which outputs a low level "0," leading to a high output at pin 10. The capacitor (C5) begins to charge, and as the voltage across it does not change instantaneously, pins 5 and 6 remain high "1," causing the output at pin 4 to drop to low "0." The SCR then conducts, allowing current to flow through the lamp, illuminating it. After approximately 30 seconds, C5 becomes fully charged, leading to a low output at pin 4, turning off the transistor and the SCR, extinguishing the light. The system resets with pin 10 at low "0," allowing C5 to discharge through R10, preparing the circuit for the next activation. The diodes (VD2, VD3) along with R2 and C6 form a half-wave rectifier circuit, providing approximately 6V DC to power the integrated circuit.

The circuit is designed to automatically control lighting based on ambient light levels and sound detection. The use of NAND gates allows for flexible logic configurations, making the circuit adaptable for various applications. The integration of a photoresistor ensures that the light remains off during the day while still being responsive to sound signals. This dual control mechanism provides an efficient solution for automated lighting systems, particularly in scenarios where hands-free operation is desired, such as in hallways or outdoor areas. The delay feature, implemented through the monostable configuration, ensures that the light remains on for a predetermined duration after sound activation, enhancing usability and energy efficiency. The inclusion of a half-wave rectifier circuit ensures that the integrated circuit receives a stable DC voltage, allowing for reliable operation of the entire system. Overall, this circuit exemplifies a practical application of digital logic in creating an intelligent lighting system that responds to environmental stimuli.Sound with CD4011 digital circuits made light lamp dual-control delay section circuit shown in Figure 3-17, the left portion of the dashed line in Fig general lighting lines, the right part is the sound and light control delay switch double circuit, SCR vs constitute lighting the main circuit switch, the control loop is two-input NAND gate CD4011 constitute four. NAND gate I composed a linear amplifier for amplifying the audio signal B microphone input. NAND gate II composed of light control switch, the NAND gate III, t composition monostable circuit. And NAND gate logic functions are: "See 0 1, all the l O". Daytime indoors light line is strong, light-sensitive resistors RO irradiated by light exhibits low resistance, so that the NAND gate II - inputs 13 feet low level "0", the output terminal II pin is high "l", it is 9 feet also as "l".

t two NAND gate inputs 5,6 feet because Rl0 ground to the low level "0", the nozzle output pin 4 is "1", 8 feet to "1." NAND gate III both inputs are "l", the output terminal IO pin to "0", low capacitance c5 both ends can not be charged, and the transistor VT due to the high base resistor R9 connected electrically and a half feet 4 Therefore VT conduction, vs VT gate is grounded off, lights are not bright. Since 13 feet low "o", so regardless of their 12 foot level changes, electronic switches are sealed bad E, the lamp can not be lighted.

In the evening, photoresistor RG light irradiation exhibit a high resistance, the resistance is much greater than R8, so] 3 feet high "l", which provided the conditions for the lights, but the output of 1 l foot level 12 foot level depends on the level of the case. When someone walking, pick up sound signal by B cz coupling into the NAND I zoom in, and then by R6 to C4 (charging time constant minimum) + 12 feet so that becomes a high level "l", in accordance with NAND gate "out of whole l 0" logic.

II pin output low level "0", 9 feet for the "O". From "See the 1 O" shows that IO pin is "l" that is 10 feet high output, the Rl0 to c5 charge. Root According to the principle of voltage across the capacitor is not mutated, 5,6 feet for the "l", so the output terminal 4 feet low "O", VT deadline, SCR vs the door to get forward by VD1 and Rl Ji opened contact current, lamp H powered light.

After about 30 seconds, c5 is fully charged, 5,6 feet returns low "O", 4 feet high output "l", VT hunt through, vs lose touch sent electric current when the AC zero crossing that off off, lights off. At steady state, 10 feet low "0", c5 by Rl0 discharge, ready for the next turn on the lights for the delay.

VD2, VD3, R2 and C6 form resistance voltage half-wave rectified line voltage, the output is about 6V DC, for the integrated circuit electricity.