Peak voltage sample and hold circuit

Description: The peak voltage sample and hold circuit is illustrated in Figure 12-50. This circuit comprises the LF398 sample and hold chip and the LM311 voltage comparator. The LF398 is responsible for outputting and inputting voltages. The LM311 compares the input voltage (U) with the output voltage (Uo) over time. When the output of the LM311 is high, it sends a signal to the logic control terminal (pin 8) of the LF398, placing the LF398 in the sampling state. As the input voltage (Ul) reaches its peak and subsequently declines, the LM311 outputs a low signal, which sets the logic control terminal of the LF398 to a low level, thereby holding the sampled voltage. The LM311 features an open collector output, necessitating the use of a pull-up resistor. Additionally, an overvoltage detection circuit is included, which sends a pulse to control a switch that turns on the sampling capacitor, enabling it to discharge only when it is not energized. Otherwise, the sampling circuit continuously tracks changes in the peak voltage.

The peak voltage sample and hold circuit functions as a critical component in various electronic systems requiring accurate peak voltage measurements. The LF398 is a versatile sample and hold amplifier that captures the peak voltage levels and maintains them for subsequent processing. The LM311 comparator serves to monitor the input voltage and determine when to switch the LF398 between sampling and holding states.

In operation, the circuit begins with the LM311 continuously comparing the instantaneous input voltage (U) against the held output voltage (Uo). When the input voltage rises and exceeds the previous peak, the LM311's output transitions to a high state, activating the LF398 to sample the new peak voltage. This transition is facilitated by the logic control terminal, which is crucial for determining the operational state of the LF398.

Once the peak voltage is captured, the LM311 monitors for any decrease in the input voltage. If the input voltage falls below the previously held voltage, the LM311 outputs a low signal, which instructs the LF398 to switch to its hold state. In this state, the LF398 maintains the last sampled peak voltage until a new peak is detected.

The use of an open collector output in the LM311 necessitates the inclusion of a pull-up resistor to ensure proper voltage levels are maintained when the output is low. This configuration allows for flexibility in interfacing with other circuit components or logic levels.

Moreover, the overvoltage detection circuit adds an additional layer of functionality, preventing damage to the circuit by controlling the discharge of the sampling capacitor. This feature ensures that the capacitor discharges only under safe conditions, thereby preserving the integrity of the sampled voltage and maintaining the reliability of the circuit's performance.

Overall, this peak voltage sample and hold circuit is essential for applications in signal processing, measurement systems, and any scenario where precise voltage tracking is required. Its design effectively balances the need for accurate sampling with protective measures to enhance circuit longevity and reliability.Peak voltage sample and hold circuit: peak voltage sample and hold circuit is shown in Figure 12-50. Peak voltage sample and hold circuit south chip sample and hold chip LF398 and a voltage comparator LM311 constitution. LF398 output and input voltages LM3J1 by comparing t When U. Uo time. LM311 output high, to LF398 logic control terminal 8 feet, LF398 in the sampling state state} When Ul peak and decline, U, <U., Output low voltage comparator LM311, LF398: Logic control terminal set to low level, so LF398 hold. Since the LM311 use open collector output, so an pull-up resistor. By the overvoltage detection circuit output terminal sent pulse control circuit switch is turned on, the sampling capacitor discharges never had electricity, otherwise sampling circuit has been tracking the peak change.