Description: The shaping block is designed to provide fixed-length impulses (2 ms) at each opening of the breaker points. This function eliminates false impulses caused by contact vibrations. As illustrated in the diagram, the shaped impulse directly triggers the EID and acts as a START impulse for the multi-spark module. When the engine's RPM is below a specified speed limit, the module generates a series of supplementary impulses that, through an OR gate, produce additional sparks via the EID. Once the speed limit is reached (for instance, 2000 RPM), the supplementary impulses cease at the module's output, preventing any further supplementary sparks. The module utilizes the shaped impulses from the breaker points for control. The time interval between consecutive impulses is dependent on the engine RPM, with values detailed in the accompanying table. During the first half of the total interval, supplementary sparks are generated after the main spark produced by the breaker points. This timing is crucial, as generating sparks outside of this half-interval could lead to the spinning distributor applying these sparks to the next cylinder, potentially damaging the engine's mechanical components. At the opening of the breaker points, the shaping circuit (not depicted in the drawing) produces a square impulse lasting 2 ms, referred to as BP, which is then applied to the EID through an OR gate to generate the main spark. In the multi-spark module, a sequence timer (a counter with decoded outputs) initializes the circuits during the 2 ms interval (full operations will be detailed later). When the BP impulse ceases, gate P2 opens, allowing counter N1 to receive impulses at a 1 ms period from the clock generator. This 8-bit counter measures the duration between two breaker-point impulses, capable of counting a maximum of 255 impulses, each lasting 1 ms (as indicated in the table, this corresponds to 120 RPM, which is significantly lower than the free-running speed). Upon the next BP impulse, P2 closes, halting the counting. The value stored in N1 represents the time length between two BP impulses. The sequence timer copies half of the number stored in N1 to N2 and then resets counter N1. When BP goes low, N1 restarts counting. Simultaneously, the up/down counter N2 begins counting impulses with a 0.5 ms period, received via gate P1. It counts down at double speed, allowing counter N2 to reach zero after T/2 time. Counter N4 and gate P5 generate impulses for supplementary sparks (2 ms in duration). This counter operates only when the INH signal is low. The flip-flop FF1 indicates the T/2 interval during which supplementary sparks will be generated and is reset when N2 reaches zero. Gates P3 and P4 release the flip-flop and initiate supplementary sparks. These gates also deactivate the multi-spark function when the engine speed limit is reached (approximately 2000 RPM). As observed in the table, at around 2000 RPM, the time interval between two BP impulses is 15 ms. This implies that after a counting cycle, the first four bits of counter N1 will be 111, followed by four zeros. In this scenario, the output of gate P3 will be low, as will the output of gate P4. Consequently, the flip-flop FF1 will not be set, resulting in no supplementary sparks. If the engine speed decreases (increasing the time length T), the last four bits of N1 will contain at least one '1', setting the flip-flop and allowing the supplementary sparks to appear until the flip-flop is reset by the borrow impulse from N2.
The circuit operates through a combination of digital and analog elements, ensuring precise timing and control over spark generation in the ignition system. The shaping block, along with the sequence timer and counters, work together to manage the timing of the impulses effectively. The use of OR gates facilitates the integration of various signals, allowing for flexibility in the ignition process. The flip-flop FF1 plays a critical role in enabling or disabling supplementary sparks based on the engine's operational state, ensuring that the ignition system functions optimally without causing mechanical stress to the engine components. The design emphasizes reliability and efficiency, critical in high-performance engine applications where timing precision can significantly impact performance and longevity.Shaping block has the role to provide fixed length impulses (2 mS) at each breaker-points opening. In this way are eliminated the false impulses which appear due contacts vibrations. As shown in drawing, shaped impulse triggers directly the EID and act as START impulse for multi-spark module. If rpm of engine is under speed limit, the module will generate a series of supplementary impulses that, through an OR gate, will generate supplementary sparks by EID. When speed limit is reached (for example, 2000 rpm), supplementary impulses stops at module output, thus no supplementary sparks will be generated.
The module uses for control the shaped impulses from breaker points. The time between two consecutively impulses depends on rpm engine and has the values shown in upper table. From whole T interval, only in the first half of this will be generated supplementary sparks, after the main spark produced by the breaker points.
This is very important, because generating sparks outside of half of the interval, the spinning distributor could apply these sparks to next cylinder, and this could be very harmful for mechanical parts of engine. At breaker-points opening, the shaping circuit (not shown in drawing) produces a square impulse having 2 mS.
This, named BP, is applied to EID by an OR gate and generate the main spark. In multi-spark module, during 2 mS interval, a sequence timer (a counter with decoded outputs) accomplishes the initialization of circuits (full operations will be detailed later). When impulse BP disappears, the gate P2 is opened and the counter N1 receives impulses with 1 mS period, from clock generator.
This 8 bits counter measures, in fact, the duration between two breaker-points impulses. It can count maximum 255 impulses, each having 1 mS (see the table, this correspond to 120 rpm, far below the free running speed !). At next BP impulse, P2 close and the counting stop. The number stored inside N1 is in fact the time length between two BP impulses. The sequence timer ½copy ½ the number stored in N1 to N2, after this resets counter N1. When BP becomes low level, N1 restarts the counting. In the same time, the up/down counter N2, starts counting the impulses having 0. 5 mS period, which comes via gate P1. It counts down, but with double speed. In this way the counter N2 reach to ½0 ½ after T/2 time. The counter N4 and gate P5 makes the impulses for supplementary sparks (2 mS length). This counter works only if INH signal is at low level. The fip-flop FF1 ½marks ½ the interval T/2 in which will be generated supplementary sparks. It is reseted when N2 reach ½0 ½. The gates P3 and P4 unlock the flio-flop and start supplementary sparks. Also, these gates switch-off the multi-spark function when engine speed limit is reached (in this case, ~ 2000 rpm).
How works this In the upper table we can see at about 2000 rpm, the time length between two BP impulses is 15 mS. This means as after a counting cycle, the first 4 bits of counter N1 will be 111 and next 4, 0000. In this case, P3 gate output will be at low level, and the same value for P4 output. The flip-flop FF1 will be not set, and as result, no supplementary sparks. If the speed engine decrease (time length T increase), the last 4 bits of N1 will have at least one 1 and the flip-flop will be set.
This allow to appear supplementary sparks until flip-flop will be reseted by borrow impulse of N2.
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